CnMemory M2N2G64TU8HD5B-AC Datasheet download pdf

M2N1G64TUH8D4F / M2N2G64TU8HD4B / M2N1G64TUH8D5F / M2N2G64TU8HD5B

M2N1G64TUH8D6F / M2N2G64TU8HD6B

1GB: 128M x 64 / 2GB: 256M x 64

Unbuffered DDR2 SO-DIMM

REV 1.1 1

07/2008

NANYA reserves the right to change products and specifications without notice.

Based on DDR2-667/800 64Mx16 (1GB)/128Mx8 (2GB) SDRAM D-Die

Features

• Performance:

Speed Sort

PC2-5300

PC2-6400

Unit

-3C

-AC

DIMM CAS Latency

fck – Clock Freqency

333

400

MHz

tck – Clock Cycle

2.5

Data Transfer Speed

667

800

Mbps

• 200-Pin Small Outline Dual In-Line Memory Module (SO-DIMM)

• 1GB: 128Mx64 Unbuffered DDR2 SO-DIMM based on 64Mx16

DDR2 SDRAM D Die devices

• 2GB: 256Mx64 Unbuffered DDR2 SO-DIMM based on 128Mx8

DDR2 SDRAM D Die devices

• Intended for 333MHz and 400MHz applications

• Inputs and outputs are SSTL-18 compatible

• V

= V

DDQ

= 1.8V ±0.1V

• SDRAMs have 8 internal banks for concurrent operation

• Differential clock inputs

• Data is read or written on both clock edges

• DRAM DLL aligns DQ and DQS transitions with clock transitions

• Address and control signals are fully synchronous to positive

clock edge

• Auto Refresh (CBR) and Self Refresh Modes

• Automatic and controlled precharge commands

• Programmable Operation:

- DIMM  Latency: 3, 4, 5

- Burst Type: Sequential or Interleave

- Burst Length: 4, 8

- Operation: Burst Read and Write

• 13/10/2 Addressing (1GB)

• 14/10/2 Addressing (2GB)

• 7.8 s Max. Average Periodic Refresh Interval

• Serial Presence Detect

• Gold contacts

• 1GB module’s SDRAMs are 84-ball BGA Package

• 2GB module’s SDRAMs are 60-ball BGA Package

• RoHS compliance

Description

M2N1G64TUH8D4F, M2N2G64TU8HD4B, M2N1G64TUH8D5F, M2N2G64TU8HD5B, M2N1G64TUH8D6F and M2N2G64TU8HD6B are

unbuffered 200-Pin Double Data Rate 2 (DDR2) Synchronous DRAM Small Outline Dual In-Line Memory Module (SO-DIMM), organized as

two ranks of 128Mx64 (1GB)/256Mx64 (2GB) high-speed memory array. M2N1G64TUH8D4F, M2N1G64TUH8D5F and 2N1G64TUH8D6F

use eight 64Mx16 84-ball BGA packaged devices and M2N2G64TU8HD4B, M2N2G64TU8HD5B and M2N2G64TU8HD6B use sixteen

128Mx8 60-ball BGA packaged devices. These DIMMs are manufactured using raw cards developed for broad industry use as reference

designs. The use of these common design files minimizes electrical variation between suppliers. All Elixir DDR2 SODIMMs provide a

high-performance, flexible 8-byte interface in a space-saving footprint.

The DIMM is intended for use in applications operating of 333MHz/400MHz clock speeds and achieves high-speed data transfer speed of

667Mbps/800Mbps. Prior to any access operation, the device  latency and burst/length/operation type must be programmed into the

DIMM by address inputs A0-A12 (1GB) / A0-A13 (2GB) and I/O inputs BA0, BA1 and BA2 using the mode register set cycle.

The DIMM uses serial presence-detect implemented via a serial EEPROM using a standard IIC protocol. The first 128 bytes of SPD data are

programmed and locked during module assembly. The remaining 128 bytes are available for use by the customer.

1 2 3 4 5 6 ... 18 19